A major end-use application for silicon carbide (SiC) junction field effect transistors (JFETs) is in power electronics designed for high ambient temperature environments. While the exceptional properties of the SiC JFET make it capable of reliable operation at high temperatures, there is currently a lack of high-temperature-capable gate drivers. Current solutions include arranging the power electronic controls in a lower temperature environment or installing extra cooling systems to maintain safe operating temperatures for part or all of the system. However, for optimal performance of any semiconductor power transistor, the gate driver circuit should be located as close as possible to the power transistor in order to reduce parasitic affects (e.g., undesirable resonance and/or ground noise on the gate control signals). These types of unwelcome parasitic affects may cause erratic switching of the power transistor and can potentially lead to device or system failure.
The typical drive method for power transistors is a totem pole circuit having a pull-up transistor and a pull-down transistor. These transistors are usually metal-oxide-semiconductor field effect transistors (MOSFETs) or bipolar junction transistors (BJTs), and are connected to a unipolar supply voltage (i.e., one positive and one ground), or two voltage supplies (i.e., one positive and one negative). [1] The most common and simplest form of a totem pole circuit is built using complementary logic (e.g., NPN and PNP or P-channel and N-channel devices). However, the same functionality can be achieved with two N-type devices.
A totem pole acts as a current amplifier and if necessary a voltage level shifter, accepting a low current drive signal at the input and generating a higher current for the load transistor. The pull-up and pull-down power supply voltages do not have to match the logic high and logic low voltages of the input control signal. Like other power transistors, the SiC power JFET can also be driven by a totem pole driver. This task can be accomplished discretely using Si BJT/MOSFETs, or even insulated gate field effect transistors (IGFETs) or metal-insulator-semiconductor field effect transistors (MISFETs). [1-4]. These devices, however, are not capable of operating at the maximum temperature rating of SiC power JFETs (i.e., at temperatures exceeding 300° C.).
Accordingly, there still exists a need for gate drivers capable of operating at the maximum temperature rating of SiC power JFETs. These drivers would allow for optimal use of SiC power JFETs (enhancement-mode or depletion-mode) in high temperature applications.